1. Field of the Disclosure
The disclosure relates generally to integrated circuit design and, more particularly, to protecting integrated circuit designs from unauthorized copying
2. Brief Description of Related Technology
As designs become more complex and on-chip transistor counts reach into the billions, a semiconductor designer's skills, methodologies, and tools are increasingly more valuable assets. This is particularly true for the small- and medium-sized fabless design companies. The soaring costs of building and maintaining state-of-the-art semiconductor manufacturing facilities and nano-scale masks is driving even the large design houses to abandon their home manufacturing and become fabless. For example, Texas Instruments (TI)—the then third largest semiconductor company in the world—announced in May 2007 a new foundry strategy by which third party foundry vendors would split the company's 45-nm fabrication.
A designer's use of a separate fabrication facility can leave the designer at substantial risk for theft of their intellectual property (IP) designs. The current trust models and royalty agreements do not fully protect the rights of the designers. The hardware IP providers pay the expenses of masks for their designs, trusting that the foundry would not make additional copies outside the contract. The ready availability of masks, low cost of silicon, and lack of IP owner's control over the manufacturing flow can facilitate illegal copying of integrated circuits (ICs). Furthermore, IC packaging obscures the chip's internals and makes it difficult to trace the owner of IP rights.
Large-scale integration of millions of nano-scale devices is used in many ICs today, including microprocessors, digital signal processing (DSP) chips, field programmable gate arrays (FPGAs), and dedicated graphic chips. A major research challenge is to develop IP protection techniques that are powerful and general enough to protect against theft of these types of devices. At a base level, protecting against theft of these devices is daunting because these devices have fundamentally different structures. For example, memory-based products, such as flash memories and FPGAs, are so regular and so flexible that locking only a small part of a chip will not prevent one from using the rest of the chip, while locking the entire chip would lead to an unacceptably high overhead.
Until recently, only passive IC protection was available, based on unique chip IDs or programmable parts. Alkabani and Koushanfar [Y. Alkabani and F. Koushanfar, “Active hardware metering for intellectual property protection and security,” USENIX Security, pp. 291-306, 2007] proposed the first active scheme to fight hardware piracy by locking the chips at fabrication such that the designer is the only entity who can send the unlocking key. The method exploits the inherent unique manufacturing variability of the ICs to generate random chip identification data (IDs). The IDs are integrated within the finite state machine (FSM) which is a modified version of the original FSM in a way that every chip starts in a unique state (locked). The designer, knowing the modified FSM structure, would be the only entity who can send the key to activate (unlock) the IC. Another remote activation scheme was proposed in Y. Alkabani, F. Koushanfar, and M. Potkonjak, “Remote activation of ICs for piracy prevention and digital rights management,” IEEE/ACM ICCAD, pp. 674-677, 2007. This method relies on a set of unique chip IDs to lock the sequential and combinational structure of the circuit by locking the transitions on the FSM of the design, for pairs of consecutive transitions of a few replicated states.